Analog Bits Partners with Intel Foundry Services as IP Alliance Partner
Analog Bits offers differentiated High-performance LC PLL, Sensors and IO’s on Intel 16
- Analog Bits joins Intel Foundry Services Accelerator – IP Alliance program
- High Performance LC PLL’s best suited for PCIe Gen4/5 class and other SERDES class applications
- Differentiated Clocking Source IO’s
- Integrated PVT Sensor
Sunnyvale, CA, February 7, 2022 – Analog Bits (www.analogbits.com), the industry’s leading provider of low-power mixed-signal IP (Intellectual Property) solutions, has joined the Intel Foundry Services (IFS) Accelerator - IP Alliance program. Analog Bits will offer on Intel 16 process a portfolio of differentiated analog mixed-signal IP’s in the areas of clocking, sensor and IO’s. All these macros will be rigorously verified on test-chips in Q2-2022 and IPs will be available in May, 2022.
“We are excited to announce the IFS Ecosystem Alliance as a major step forward for Intel's foundry ambitions,” said Rahul Goyal, VP and GM of Intel Product & Design Ecosystem Enablement. “We are pleased to have Analog Bits join the alliance as a charter member. We look forward to working with Analog Bits to extend their leadership IP with IFS for the benefit of our mutual global customers.”
“Intel is unleashing its silicon design and manufacturing expertise to build customers’ world-changing products. We are pleased to expand our differentiated IP offerings at Intel Foundry Services for customers mandating domestic manufacturing.” said Mahesh Tirupattur, Executive Vice President at Analog Bits. “Our close collaboration with Intel gives us the opportunity to expand our mutual customers and deliver the best-in-class IPs with optimal performance. We look forward to all the opportunities Intel Foundry Services will bring in the future”
About Analog Bits
Founded in 1995, Analog Bits, Inc. (www.analogbits.com) is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SOCs.
Our products include precision clocking macros, Sensors, programmable interconnect solutions such as multi-protocol SERDES and programmable I/Os. With billions of IP cores fabricated in customer silicon, from 0.35- micron to 3nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.
Analog Bits to Demonstrate Pinless PLL and Sensor IP’s in TSMC N5 Process at TSMC 2022 North America Technology Symposium￼
Analog Bits will be showcasing the silicon of its Core Voltage Powered PLL and PVT Sensor on TSMC’s industry-leading N5 process at its booth during the upcoming TSMC 2022 NA Technology Symposium
Watch our Executive Vice President Mahesh Tirupattur present his paper on PCIe/CXL Gen 5 low latency SERDES in Samsung's advanced process of 8LPP.
Analog Bits to Present Papers, Demo of N5 Working Silicon, and Roadmap on IPs for TSMC N4 and N3 Processes
Company to present two technical papers on N5 IPs, demonstrating working Silicon of Foundation IPs Including PLLs, Sensors and IO’s Showcases Significant & Broad PPA Benefits of N5 Technology at 2021 TSMC Open Innovation Platform® (OIP) Ecosystem Forum
Analog Bits to Present Papers on Wafer-Scale Sensors and PCIe Clock Systems at TSMC 2020 Open Innovation Platform® Ecosystem Forums
Analog Bits will present two ground-breaking papers at this year’s TSMC Online Open Innovation Platform® (OIP) Ecosystem forums on August 25th
The complete family of analog and mixed-signal IPs, now with characterization report is immediately available for customer integration and tape-out