Sweta Gupta is the Vice President of Engineering at Analog Bits, where she leads development and execution of mixed-signal IP’s, managing circuit and layout teams.

N2P2 test chip provides 12 IP designs and measured silicon to validate power, timing, and sensing integration on advanced TSMC processes.

Analog Bits is expanding its role in advanced semiconductor design with new intellectual property aimed at one of the industry’s most difficult problems: delivering, monitoring, and managing power inside increasingly complex chips.

Analog Bits will showcase new real-time power observability and sensing analog IP in TSMC’s N2P process technology and present a paper with Cerebras

Visit DAC 2026 booth 949 to see live demos of the TSMC N2P IP portfolio and meet Analog Bits engineering experts.

Analog Bits to Present at EE Times Virtual Event, "The Road To Chiplet Scalability" on June 24th, 2026. Alan Rogers, Analog Bits President and CTO, and Mahesh Tirupattur, Analog Bits CEO, to participate.

We are honored to be featured in a recent SemiWiki article discussing our demos of real-time on-chip power sensing and delivery on N2P at the TSMC 2026 Technology Symposium.

Analog Bits continues to develop innovative mixed signal IP in TSMC N2P process technology, with integrated LDOs, pinless remote PVT sensors, and microwatt class and high-performance LC PLLs

We are honored to be featured in a recent SemiWiki "CEO Interview" article discussing company highlights from 2025 and our outlook for 2026.