Alan Rogers

Alan Rogers

President and CTO

Alan Rogers is the President and CTO of Analog Bits, Inc. He has grown Analog Bits into the premier supplier of custom transistor-level IP solutions for both fabless and IDM companies and continues to oversee technology development for customer applications.

Mr. Rogers' technical background includes server-class microprocessors, volume consumer semiconductors and high reliability aerospace and defense applications, and he holds numerous patents.

Mahesh Tirupattur

Mahesh Tirupattur

Executive Vice President

Mahesh Tirupattur is the Executive Vice President at Analog Bits responsible for business partnerships, IP licensing, and joint venture development. He has helped lead Analog Bits to its position as the leader in integrated timing and interface IP.

Prior to Analog Bits, Mr. Tirupattur held executive level positions leading IP and library companies. He earned his MSEE from Arizona State and a business degree from the University of California, Berkeley.

Michael Ang

Michael Ang


Michael Ang serves as CTO of SERDES for Analog Bits. Mr. Ang has driven the company's technical teams to achieve first-time right SERDES and I/O product success in multiple fabs at multiple process nodes.

Mr. Ang has held technical executive positions at leading systems and semiconductor companies across a variety of application platforms He received his MSEE from Stanford University and his BSECE from De La Salle University and has been granted over 40 US patents.

Chaim Amir

Chaim Amir

VP of Engineering

Chaim Amir is the VP of Engineering at Analog Bits, where he focuses on engineering management, design and delivery of all IP products.

Mr. Amir has senior technical and management experience at leading semiconductor and computer companies including, Rambus, HP and Sun Microsystems. He received a BSEE from the Israel Institute of Technology, and MSEE from Santa Clara University. He holds several circuit design patents.

Sweta Gupta

Sweta Gupta

Director of Circuit Engineering

Sweta Gupta is the Director of Circuit Engineering at Analog Bits, where she leads development and execution of Foundation Analog IP’s.

Sweta has been a part of Analog Bits team since 2004 and she has successfully managed and delivered mixed-signal IP’s including low jitter PLL’s, low power crystal oscillators, PVT sensors and power supply monitors on leading edge process geometries. She received her MSEE degree from Arizona State University and BSEE degree from Osmania University, India.

Will Wong

Will Wong

Director of Customer Support

Will Wong is Director of Customer Support at Analog Bits, providing clients worldwide with the most responsive technical support in the industry.

Mr. Wong brings his BSEE and extensive customer, applications and program management experience honed at leading EDA, semiconductor, library and IP companies, to the task of ensuring smooth customer interactions from specification through to working silicon.



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TSMC Technology Symposium



TSMC NA OIP Ecosystem Forum

Virtual Event



TSMC CN OIP Ecosystem Forum

Virtual Event



TSMC EU OIP Ecosystem Forum

Virtual Event


Analog Bits to Demonstrate 5nm IP Silicon at TSMC 2021 Online Technology Symposium

Company to present demo of IPs on 5nm test chips at TSMC Online Technology Symposium

Analog Bits Announces Analog IP Availability on Samsung Technologies

Company to present differentiating, low power analog foundation IP and SERDES technology at Samsung Foundry SAFE Forum 2020

Analog Bits Announces Foundation Analog IP Availability on GLOBALFOUNDRIES 12LP FinFET Platform

Analog Bits silicon-proven IP is available now on GF’s 12LP and design kits are available for 12LP+IP

Analog Bits Provides Enabling IP for Graphcore IPU-Machine M2000

Wide-range PLL and low-power, small footprint PVT sensor deployed in new machine Intelligence compute blade on 7nm technology

Analog Bits to Present Papers on Wafer-Scale Sensors and PCIe Clock Systems at TSMC 2020 Open Innovation Platform® Ecosystem Forums

Analog Bits will present two ground-breaking papers at this year’s TSMC Online Open Innovation Platform® (OIP) Ecosystem forums on August 25th

Analog Bits Showcases Silicon of Analog and Mixed Signal IP Products on TSMC N7 Process

The complete family of analog and mixed-signal IPs, now with characterization report is immediately available for customer integration and tape-out

Analog Bits and GLOBALFOUNDRIES Deliver Differentiated Analog and Mixed Signal IP for High-Performance Mobile and Compute Applications

Analog Bits’ Analog and Mixed Signal IPs Including Various PLLs, PCIe Reference Clock, Sensors and Power Circuits with GLOBALFOUNDRIES 12nm FinFET (12LP) Enable Customers Lowest System Level Cost & Power

Analog Bits Showcases PCIe Gen2/Gen3/Gen4 Reference Clock PHY Design Kits Available on TSMC 7nm/12nm/16nm/22nm Process Technology

Analog Bits is highlighting front-end design kits for a complete PCIe clocking subsystem

Analog Bits to demonstrate Low Power SERDES at TSMC’s Open Innovation Platform® Ecosystem Forum

Analog Bits will demonstrate this licensable IP core running on TSMC’s 12nm process geometry.

Analog Bits to Demonstrate New High Performance and Ultra-Low Power SERDES IP at TSMC’s Open Innovation Platform® Ecosystem Forum

Analog Bits will demonstrate two new IP solutions at this TSMC’s Open Innovation Platform Ecosystem Forum in Santa Clara, CA.

Analog Bits Announces Mixed Signal Design Kits for 7nm at TSMC Technology Symposium

Analog Bits announced availability of front-end design kits which enable use of low power IP on TSMC’s latest 7nm process nodes.