Sweta Gupta is the Vice President of Engineering at Analog Bits, where she leads development and execution of mixed-signal IP’s, managing circuit and layout teams.

N2P2 test chip provides 12 IP designs and measured silicon to validate power, timing, and sensing integration on advanced TSMC processes.

Analog Bits is expanding its role in advanced semiconductor design with new intellectual property aimed at one of the industry’s most difficult problems: delivering, monitoring, and managing power inside increasingly complex chips.

Visit DAC 2026 booth 949 to see live demos of the TSMC N2P IP portfolio and meet Analog Bits engineering experts.

We are honored to be featured in a recent SemiWiki article discussing our demos of real-time on-chip power sensing and delivery on N2P at the TSMC 2026 Technology Symposium.

We are honored to be featured in a recent SemiWiki "CEO Interview" article discussing company highlights from 2025 and our outlook for 2026.

Analog Bits CEO, Mahesh Tirupattur, was the guest for a recent SemiWiki podcast. Listen to the podcast below.

We are honored to receive the 2025 OIP Partner of the Year Award from TSMC in the Analog IP category for enabling customer designs with broad portfolio of IPs to accelerate design creation.

We are honored to be featured in a recent SemiWiki article recapping the TSMC 2025 North America Open Innovation Platform® (OIP) where we announced our new IP including LDOs, power supply droop detectors, and embedded clock LC PLLs on TSMC's N3P and N2P processes.

Analog Bits CEO, Mahesh Tirupattur, was recently interviewed by EE Times. See the interview below.