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Analog Bits to Present at EE Times Virtual Event, "The Road To Chiplet Scalability" on June 24th, 2026

Alan Rogers, Analog Bits President and CTO, and Mahesh Tirupattur, Analog Bits CEO, to participate.

When

June 24-25, 2026

Location

Virtual

Register

EE Times "The Road to Chiplet Scalability"

Explore the future of scalable semiconductor design at “EE Times Presents: The Road To Chiplet Scalability.” Analog Bits President and CTO, Alan Rogers, and CEO, Mahesh Tirupattur, will be among industry leaders discussing chiplet architectures, advanced packaging, interconnect technologies, 2D/3D integration, and scalable platforms powering AI, cloud, and high-performance computing. See session information below:

Power and Thermal Efficiency Challenges of Chiplets

Presented by Alan Rogers, President and CTO, Analog Bits As advanced semiconductor technologies move into FinFET and Gate-All-Around (GAA) nodes, power is emerging as a defining architectural constraint for next-generation chiplet systems. AI, HPC, and automotive workloads are driving unprecedented increases in power density, thermal stress, and workload variability, forcing the industry to rethink how performance, efficiency, and reliability are balanced. This fireside chat explores how intelligent power and thermal management is reshaping chiplet architecture through real-time telemetry, adaptive voltage regulation, distributed sensing, and closed-loop optimization. The discussion will highlight how modern chiplet platforms can achieve higher performance-per-watt, reduce design margins, and improve system resilience while operating within increasingly constrained power and thermal envelopes.

(CT3) Panel Discussion: Scaling Chiplets Without Breaking the System – Where are the Limits?

This Panel Discussion with industry experts is moderated Nitin Dahad, Executive Editor, EE Times.

As chiplet-based designs grow in scale and complexity, the technical challenges mount up as every layer of the system introduces new constraints. This panel will explore where those limits are today and what it will take to push beyond them. Where are the bottlenecks in scaling multi-die designs and what trade-offs are still required across design, manufacturing and integration?

Panelists:

Sachin Gandhi, Co-founder and CEO, Retym
Sailesh Kumar, Founder and CEO, Baya Systems
Mahesh Tirupattur, Chief Executive Officer, Analog Bits
Dave Welch, CEO, AttoTude

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