News Alert
Analog Bits to Present Papers on Wafer-Scale Sensors and PCIe Clock Systems at TSMC 2020 Open Innovation Platform® Ecosystem Forums
Paper One: Case Study of AI Wafer Scale SoC from Cerebras Systems using Analog Bits Power Integrity Sensors
- High-precision, high-sensitivity, small footprint sensors which can populate wafer scale SOC effectively and economically
- Programmable, multi-threshold, cascadable sensors used to monitor all wafer level power and operations
Paper Two: Design & Integration of Complete On-die Clock Subsystem for PCIe Gen 5
- On-die PCIe clock source for high-precision, low-jitter, and small footprint
- Expanding PCIe Gen5 clock subsystem into other clocking needs, such as Ethernet
WHEN
August 25th, 2020
WHERE
Both papers are available via TSMC Online Forums, under the HPC/3DIC track
Santa Clara, CA, August 24, 2020 – Analog Bits (www.analogbits.com), a leading provider of low-power mixed-signal IP (Intellectual Property) solutions, will be presenting two ground-breaking papers at this year’s TSMC Online Open Innovation Platform® (OIP) Ecosystem forums on August 25th.
Resources
To learn more about Analog Bits’ foundation analog IP, visit www.analogbits.com or email us at: info@analogbits.com.
About Analog Bits
Founded in 1995, Analog Bits, Inc. (www.analogbits.com), is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SOCs.
Products include precision clocking macros such as PLLs & Sensors programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s as well as specialized Sensors.
With billions of IP cores fabricated in customer silicon, from 0.35-micron to 5-nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.
Editorial Contact:
Will Wong
650-314-0200
will@analogbits.com