News Alert

Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at 2024 TSMC Open Innovation Platform Ecosystem Forum

Highlights

 

  • Analog Bits will be presenting their joint paper titled “Optimized Power Management of ARM CPU Cores with Integrated Analog Bits Power Management and Clocking IP’s” at the Virtual portion of the event, and “On-Die High Accuracy Thermal and Voltage Sensing to Lower System Cost and Reliability” at the Europe event.
  • Analog Bits will showcase their new LDO, High accuracy PVT Sensors, High Performance Clocks, Droop Detectors, and more in N3P.

When

September 25, 2024

Location

Santa Clara Convention Center, Booth #708

Sunnyvale, CA, September 23, 2024 – Analog Bits (www.analogbits.com), the industry’s leading provider of low-power mixed-signal IP (Intellectual Property) solutions will be demonstrating its newest LDO IP, Power supply droop detectors, Embedded Clock LC PLL’s, and more in TSMC N3P process at the company's booth at the 2024 TSMC Open Innovation Platform® (OIP) Ecosystem Forum in Santa Clara Convention Center, Santa Clara, California. This demonstration is showcasing Analog Bits’ industry leading portfolio of Mixed Signal IP in advanced 3nm, 4nm, and 5nm processes. Analog Bits has also taped out their next generation N2P IPs.

“Analog Bits continues to innovate and solve harder SoC design challenges for customers designing in N3 and N2 processes which manifests as novel IP’s,” said Mahesh Tirupattur, Executive Vice President at Analog Bits. “With SoC’s increasingly multicore managing power into the cores is imperative. We have designed novel LDO macros that can be easily scaled, arrayed and shared adjacent to CPU cores and simultaneously monitoring power supply health with our detector macros allowing customers to balance power real time. It is like PLL’s that maintain clocking stability; we are now able to offer IP’s to maintain power integrity in real time. Come and see our demos and also come and sample Analog Bits 2024 holiday wine at our booth.”

About Analog Bits

Founded in 1995, Analog Bits, Inc. is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SOCs. Our products include precision clocking macros, Sensors, programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s. With billions of IP cores fabricated in customer silicon, from 0.35 micron to 3nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.

 

Editorial Contact:

Arthur Rogers
Analog Bits
arthur@analogbits.com
(650) 314-0200

Analog Bits Awarded TSMC’s 2025 OIP Partner of the Year Award

We are honored to receive the 2025 OIP Partner of the Year Award from TSMC in the Analog IP category for enabling customer designs with broad portfolio of IPs to accelerate design creation.

Analog Bits Steps into the Spotlight at TSMC OIP – SemiWiki Article

We are honored to be featured in a recent SemiWiki article recapping the TSMC 2025 North America Open Innovation Platform® (OIP) where we announced our new IP including LDOs, power supply droop detectors, and embedded clock LC PLLs on TSMC's N3P and N2P processes.

Analog Bits Adds New Power and Energy Management IP Blocks Proven on TSMC N2P and N3P Processes at TSMC 2025 OIP Ecosystem Forum

Company will demonstrate newest LDOs, PLLs, and sensors proven on TSMC’s latest process technologies at the TSMC 2025 Open Innovation Platform® (OIP) Ecosystem Forum in Silicon Valley

Making Energy and Power Management Intelligent – Mahesh Tirupattur’s Interview with EE Times

Analog Bits CEO, Mahesh Tirupattur, was recently interviewed by EE Times. See the interview below.

Analog Bits at the 2025 Design Automation Conference – SemiWiki Article

Analog Bits will showcase multiple working analog IPs at the 2025 Design Automation Conference, including at 2nm and 3nm nodes.

Analog Bits Steals the Show with Working IP on TSMC 3nm and 2nm and a New Design Strategy – SemiWiki Article

We are honored to be featured in a recent SemiWiki article highlighting our demos of working IP on TSMC 3nm and 2nm at the TSMC 2025 North American Technology Symposium

Analog Bits to Demonstrate IP Portfolio on TSMC 3nm and 2nm Processes at TSMC 2025 Technology Symposium

Novel Power Management such as LDO, Droop Detector, Low Jitter and Pinless Clocking and High Accuracy PVT Sensor IP’s

2025 Outlook with Mahesh Tirupattur of Analog Bits – QA with SemiWiki

We were honored to be featured in a recent SemiWiki article looking back at highlights from 2024. Our CEO, Mahesh Tirupattur, also discusses our plans for business growth and expectations for the industry in 2025.

Analog Bits Builds a Road to the Future at TSMC OIP

We were honored to be featured in a recent SemiWiki article highlighting our recent sensing and power management innovations presented at the recent TSMC Open Innovation Platform (OIP) Ecosystem Forum.

Analog Bits Momentum and a Look to the Future

We were honored to be featured in a recent SemiWiki article highlighting our emerging 2nm designs and our focus on the future.