Analog Bits to demonstrate Low Power SERDES at TSMC’s Open Innovation Platform® Ecosystem Forum
- Analog Bits will demonstrate this licensable IP core running on TSMC’s 12nm process geometry.
- Implementations of this same multi-protocol SERDES architecture are available on a variety of TSMC process nodes and support speeds of up to 25Gb/s.
Santa Clara, CA, April 23rd, 2019 – Analog Bits (www.analogbits.com), an industry leading provider of low-power mixed-signal IP (Intellectual Property) solutions, with a low picojoule-per-bit SERDES macro, will demonstrate this licensable IP core running on TSMC’s 12nm process geometry. Implementations of this same multi-protocol SERDES architecture are available on a variety of TSMC process nodes and support speeds of up to 25Gb/s. The combination of high performance and low power make this an excellent solution for short reach, chip-to-chip applications while support for multiple protocols means that the same SERDES architecture can be used in silicon devices requiring interfaces like SAS and PCIe. Analog Bits' products are used by numerous customers, ranging from current industry leaders such as Microchip to new companies like Wave Computing. Products include other mixed-signal IP such as PLLs, IOs and Sensors and are ported to TSMC’s advanced manufacturing nodes – including 7nm.
- New ultra-low power, multiprotocol SERDES architecture in TSMC 12FFC for low power, short reach applications
- 25Gb/s-class high performance SERDES for Data Center and enterprise applications.
October 3, 2018
TSMC 2018 Open Innovation Platform Ecosystem Forum
Booth: 308 Santa Clara Convention Center
5001 Great America Parkway Santa Clara, CA 95054
About Analog Bits
About Analog Bits: Founded in 1995, Analog Bits, Inc. (www.analogbits.com), is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SOCs.
Products include precision clocking macros such as PLLs & DLLs, programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s, Sensors, as well as specialized memories such as high-speed SRAMs and TCAMs.
With billions of IP cores fabricated in customer silicon, from 0.35-micron to 7-nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.
Analog Bits to Present Papers on Wafer-Scale Sensors and PCIe Clock Systems at TSMC 2020 Open Innovation Platform® Ecosystem Forums
Analog Bits will present two ground-breaking papers at this year’s TSMC Online Open Innovation Platform® (OIP) Ecosystem forums on August 25th
The complete family of analog and mixed-signal IPs, now with characterization report is immediately available for customer integration and tape-out
Analog Bits and GLOBALFOUNDRIES Deliver Differentiated Analog and Mixed Signal IP for High-Performance Mobile and Compute Applications
Analog Bits’ Analog and Mixed Signal IPs Including Various PLLs, PCIe Reference Clock, Sensors and Power Circuits with GLOBALFOUNDRIES 12nm FinFET (12LP) Enable Customers Lowest System Level Cost & Power
Analog Bits Showcases PCIe Gen2/Gen3/Gen4 Reference Clock PHY Design Kits Available on TSMC 7nm/12nm/16nm/22nm Process Technology
Analog Bits is highlighting front-end design kits for a complete PCIe clocking subsystem
Analog Bits to Demonstrate New High Performance and Ultra-Low Power SERDES IP at TSMC’s Open Innovation Platform® Ecosystem Forum
Analog Bits will demonstrate two new IP solutions at this TSMC’s Open Innovation Platform Ecosystem Forum in Santa Clara, CA.
Analog Bits announced availability of front-end design kits which enable use of low power IP on TSMC’s latest 7nm process nodes.