Billions of IP in Silicon
Early access to TSMC shuttles Rigorously silicon verifying our IP’s in early and multiple test-chipsRapidly migrating and maintaining IP’s with new process rule changes and PDK updatesBroadening our portfolio of differentiated IP’s in every process node – understanding our customers needsMultiple market adoption of our N5 IP’s in prestigious SoC designs around the worldEarly N3 customers
Analog Bits and TSMC – N5
Analog Bits has been an early partner of TSMC in N5 process node and continuing in TSMC’s most advanced N3 process node. The ability to work with TSMC in advanced processes is a tremendous differentiating value that Analog Bits adds to your designs as we have supported numerous designs well before your design start and what you are assured is a proven IP that has been carefully crafted for optimal power, performance and area.
Benefits of this advanced node collaboration
- Early access to TSMC shuttles to rigorously silicon verifying many of our IP’s in early test-chips and multiple test-chips to de-risk your SoC design using our IP’s
- Rapidly migrating and maintaining the IP’s with new process rule changes and PDK updates
- Broadening the portfolio of our differentiated IP’s in every process node understanding our customer needs
- Multiple market adoption of our N5 IP’s in prestigious SoC designs around the world and early N3 customers
New and novelty IP’s in N5 & N3
- Clocking – Pinless/core voltage powered PLL, C2C PLL, Ref Clock PLL’s,
- Sensor – Pinless/core voltage PVT Sensor, System Power Detector
- IO’s – C2C IO’s, Differential clock drivers and receivers, Low Noise Crystal Oscillators, etc
- SERDES – PCIe Gen4/Ethernet SERDES that will be made available for automotive class SoC’s
Product Datasheets for TSMC – N5
Select processes and nodes below. Results will display below the selector box. Click to download, or right click to open the datasheet in a new browser tab or window.