Billions of IP in Silicon

Silicon Proven PCIe Gen4/5 IP in 8LPP
32G performance demonstrated on Samsung 8LPP
PIPE compliant PHY integrates easily with industry standard controllers

Analog Bits and Samsung –

8LPP

 

Analog Bits and Samsung and our mutual customers have collaborated to offer a unique low power PCI Gen4/5 SERDES on Samsung 8LPP. These SERDES are low-power multi-rate, multi-protocol and optimized for area and power.

The SERDES IP is Silicon Proven in 8LPP and undergoing extensive lab characterization. These IP’s are readily available for design now.

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Benefits of this advanced node collaboration

    • Silicon Proven PCIe Gen4/5 IP in 8LPP
    • PIPE compliant PHY integrates easily with industry standard controllers
    • 32G performance demonstrated on Samsung 8LPP

Some new and novelty IP’s we have in 8LPP

  • Low Power and Optimized for Performance PCIe SERDES
  • PLL IP’s:
    • Integer/FracN PLL and Ref Clock PLL’s available upon request
  • Sensor IP’s:
    • PVT Sensor available and Power Supply Sensors available upon request

We trust you will find the following product datasheets helpful. Please feel free to contact us for your SoC IP needs.

We look forward to being your 8LPP IP Partner.

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Product Datasheets for Samsung – 8LPP

 

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