Billions of IP in Silicon

Silicon proven IP available in Q1-2021
Early access to GF shuttles
Rigorously silicon verifying our IP’s in early and multiple test-chips
Rapidly migrating and maintaining IP’s with new process rule changes and PDK updates
Broadening our portfolio of differentiated IP’s in every process node – understanding our customers needs
Multiple market adoption of our 12LP and extending that to 12LP+

Analog Bits and Global Foundries –

12LPP

 

Analog Bits has been an early partner of Global Foundries in 12LPP process node as an extension to silicon proven 12LP process node.

The ability to work with GF’s most advanced processes is a tremendous differentiating value that Analog Bits brings to your designs. We have supported numerous designs well before your design start.

You can be assured that this is a proven IP that has been carefully crafted for optimal power, performance and area.

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Benefits of this advanced node collaboration

    • Silicon proven IP available in Q1-2021
    • Early access to GF shuttles to rigorously silicon verifying many of our IP’s in early test-chips and multiple test-chips to de-risk your SoC design using our IP’s
    • Rapidly migrating and maintaining the IP’s with new process rule changes and PDK updates
    • Broadening the portfolio of our differentiated IP’s in every process node by understanding our customer needs
    • Multiple market adoption of our 12LP and extending that to 12LP+

Some new and novelty IP’s we have in 12LP

    • Clocking:
      • Wide-Range Integer FracN PLL with SSCG
      • PCIe Gen2/3 Ref Clock Generator with SSCG
      • PCIe Gen4/5 Ref Clock Generator with SSCG  
    • Sensor:
      • PVT Sensor
      • POR Macro with OCD Detection

We trust you will find the following product datasheets helpful. Please feel free to contact us for your SoC IP needs.

We look forward to being your GF 12LPP IP Partner.

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Product Datasheets for Global Foundries – 12LPP

 

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