Billions of IP in Silicon

Silicon Proven IP in 7LPP
Easy Migration to 5LPE
Differentiated Low Power PCI Gen4 IP
Area and power optimized Gen3 PHY
PIPE compliant PHY integrates easily with industry standard controllers

Analog Bits and Samsung –

5LPE & 7LPP

 

Analog Bits and Samsung and our mutual customers have collaborated to offer a unique low power PCI Gen3/4 SERDES on Samsung 7LPP. These SERDES are low-power multi-rate, multi-protocol and optimized for area and power. The SERDES IP’s have been tape-out in silicon and silicon characterization reports will be available in Q4-2020. The SERDES IP is layout compatible to 5LPE process.

Additionally, Analog Bits and Samsung will be offering PVT Sensor in 5LPE process that will be available in Q2 2021 to our mutual foundry customers.

Stay tuned for more advanced IP’s that will be made available in 5LPE.

More Analog Bits IPs

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Benefits of this advanced node collaboration

    • Silicon Proven IP in 7LPP
    • Easy Migration to 5LPE
    • Differentiated Low Power PCI Gen4 IP
    • Area and power optimized Gen3 PHY
    • PIPE compliant PHY integrates easily with industry standard controllers

Some new and novelty IP’s we have in 5LPE & 7LPP

    • Low Power and Optimized for Performance PCIe SERDES
    • PLL IP’s:
      • Core Power Pinless PLL and Ref Clock PLL’s available upon request
    • Sensor IP’s:
      • PVT Sensor available and Power Supply Sensors available upon request

We trust you will find the following product datasheets helpful. Please feel free to contact us for your SoC IP needs.

We look forward to being your 5LPE and 7LPP IP Partner.

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Product Datasheets for Samsung – 5LPE & 7LPP

 

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