Analog Bits continues to revolutionize
SoC development in modern CMOS
processes
Upcoming Tradeshow and Events in 2009:
Please come and visit us
- March 8th to 10th: Meet our executives at the Semico show in Scottsdale,
Arizona
- April 21st: TSMC Technology Symposium, San Jose
- May 12th: TSMC Technology Symposium, Amsterdam
- June 2nd, 3rd: GSA Suppliers Expo, Munich, Germany
- June 10th: TSMC Technology Symposium, Taiwan
- July 27th to 30th: DAC, San Francisco
- Oct 1st: GSA Expo, Santa Clara Convention Center
- Oct 21st to 23rd: ARM Techcon3, Santa Clara Convention Center
- Oct 27th: TSMC OIP Symposium, Santa Clara
2008 News
- Silicon proven clocking IP macros in TSMC 40nm and Common Platform 45LP
available now.
Programmable 1-10G SERDES and DDR-2/3 macros available in 40nM
- PCI Express and SATA qualified SERDES available in 0.13u to 65nM processes.
DDR2/3 Combo IO pads in 0.13u to 65nM processes.
- 65/55nM in mass production in 6 fabs/processes
- High speed custom memories and TCAM's in mass production in high-performance
computing servers
2007 News
- News
Analog Bits IP’s in mass production in numerous 65nM processes and fabs
- 7G SERDES performance demonstrated on first silicon in 65G process
- Analog Bits SERDES shipping in mass production in high-end graphics cards and supercomputer machines
- Delivered IP’s in multiple IP’s in 40nM/GS and 45nm/LP processes
- Beacon Award Finalist for IBM Common Platform Solutions
2006 News
- Low-power clocking solutions from
Analog Bits qualified in production designs at multiple
65nM foundries and processes
- Market Leading HDTV product and DVD recorders ramps
to mass production using Analog Bits 90nM IP at TSMC
- Digital Camera products ramps mass production using
Analog Bits IP in Fujitsu 90nm LP process
- IBM Microelectronics endorses Analog Bits as the
Premier CMOS IP Supplier
- Analog Bits clocking solution was chosen as the
Finalist for IBM Beacon
Award
- Low-power clocking solutions from Analog Bits qualified
in production
designs at multiple 90nM foundries and processes
- High speed custom memories and TCAM's in mass production
in high-performance
computing servers
- Fujitsu chooses Analog Bits as a key partner to
offer low power clocking
solutions in 90nm process
2005 News
- Analog Bits custom low power SERDES proven in multiple
0.13u processes.
- 90nM PLL's and DLL's demonstrated on customer's
end products. Achieved over
- 3.2GHz PLL operation and 800Mb/s de-skew capability
on DDR-DLL's
- 1st Silicon offers Analog Bits wide-range PLL as
a part of fab-sponsored IP
in 0.18 process.
- Analog Bits PLL, DDR-DLLs achieve Level V certification
("Production Ready")
at TSMC IP 9000
- Analog Bits chosen by IBM as the Specialist Low
Power Clocking Provider
image sensor, high volume applications
- Analog Bits PLL SSCG and Video Class PLLs production
proven in high-end game
console
2004 News
- Analog Bits selected by TSMC as QuickStart IP Partner
- Analog Bits offers silicon-proven Wide Range PLLs
for Chartered
- 0.13u-Nominal process
- Analog Bits certified as "Ready For IBM Technology"
- Analog Bits offers silicon-proven compiled PLL's
silicon proven in IBM 8sF
- process
- Japanese IDM ranked Analog Bits PLL as "Best
in Class PLL" for CMOS
technology for TSMC CL13G process
2003 News
- High-end graphics system boards ships in volume
using Analog Bits Video
Clock Synthesizer and AGP PLL
- Analog Bits Video Capture PLL is in volume production
at TSMC and used major
brand flat-panel monitors*
- Analog Bits ships PLL technology for UMC and IBM
sponsored PLL compiler
* Video Capture PLL Technology is an unique core,
not commercially available as an IP from other third-party
IP suppliers or IC manufacturers. IP is fully qualified
and shipping in volume at TSMC 0.25u logic process
If you are interested in finding out more about our customer
success, please click
here to contact us. |